Measurement method for controlling deep silicon structures for 3D chip integration (KoSi)
The exchange of data or signals, for example in the 5G technique between different components of a microelectronic system depends strongly on compounds of the individual components. Great efforts have been made in the semiconductor industry not only to increase the performance, but also to realize ever smaller components for miniaturization and size reduction. Although the most popular interconnect technology has been the Cu wire interconnect because of its simplicity, in recent years there has been a great deal of interest in Deep Silicon Vias or Through Silicon Vias (TSV) technology as well as improved etch techniques and deposition techniques, including in particular, the Deep Reactive Ion Etching (DRIE) using the Bosch process, a feasibility allow.
Figure 1: Comparison between a wired stacked chip structure and a through-silicon via stacked chip structure. The further development of the 3D chip packaging depends strongly on the TSV technology and should achieve much higher yields. https://semiengineering.com/whats-what-in-advanced-packaging/
Compared to the wire connection, which acts as a bottleneck between high-performance logic and random access memory (RAM) chips (Figure 1), which are the core / mass of each computer, TSVs provide a short and robust electrical connection between the first metal layer of the computer wafer front and back, increasing integration density and performance. The stage of this technology is moving rapidly from the research level to the mass production of the RAM and logic industry. Not only the connections for SOCs (System on Chip), but also a variety of consumer and professional device systems such as Microelectric Mechanical Systems (MEMS) for smartphones, automotive, Internet of Things (IoT) and healthcare can benefit. In the case of image capture, for example, this technology allows the connection of stacked silicon chips through direct contact to allow for fast signal processing and improved photo recognition. Since 2011, 3D wafer-based MEMS modules have been commercially available from VTI Technologies Oy (now Murata Electronics Oy) based on the direct stacking of MEMS and application specific integrated circuits (ASIC) using TSV technologies to provide a miniaturized MEMS Module to get. An approach from Laboratoire d'electronique des technologies de l 'information (LETI) was applied in 2010 to an RF MEMS switch. X-FAB MEMS Foundry GmbH is also active in the field of MEMs fabrication on the basis of TSV technology. AMS Technologies AG uses W-TSVs for their CMOS optical sensors. At the IHP, sensors based on the SiGe BICMOS technology will also be developed using TSV technology.
The aim of the project is the development of an optical measurement system for the measurement and technological control of TSV (Through-Silicon Via) -3D technologies, to improve the yield and to support new integration-increasing developments. The integration of the wafer backside and the wafer or chip stacking with the help of the TSVs opens up the possibility of integrating new and highly integrated sensors, MEMS, fluidic and photonic devices into semiconductor manufacturing. These TSV technologies require universal measuring methods for the detection of layers and overetching on the ground in extremely deep vias up to the full wafer thickness (with 8 "wafers 750 μm). The development of a suitable measurement method and evaluation algorithm is the subject of the project. The evaluation is based on laboratory samples with industrially relevant wafers.